A Virtual platform for high speed message-passing-hardware research

The proposal of this work is to emulate a non coherent, shared memory based hardware message passing interface of a theoretical, future chip multiprocessor (CMP) by making use of virtualization techniques on todays SMP machines. The individual processing nodes of the system are represented by virtual domains which each run on one core of a multi core CPU with a coherent shared memory system.

In addition we describe the implementation of a virtual network interface card using this emulated hardware message passing interface. Together with some control scripts, this environment implements the virtual research platform. It allows to compare various configurations of message passing hardware. The exemplary implementation of a special routing protocol extends the design space of this platform.

The research platform allows to port the virtual network interface card and other software implemented and tested on this platform onto a real many core chip. It can provide simulation results for different configurations of message passing hardware much faster than traditional approaches.